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Chip to Chip

Cutting Edge Chip to Chip Solutions

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Overview

Comcores chip-to-chip portfolio consists of JESD204B, JESD204C, JESD204D and JESD204 Verification IP, Interlaken IP, MIPI RFFE Master and Slave IP Cores. Comcores is a leading provider of JESD204B and JESD204C. The JESD IP comes with the widest parameter set available and has gone through extensive testing. The JESD IP core enables quick and reliable deployment of both the transmitter (TX) and the receiver (RX) link layer and comes optionally with a tightly integrated transport layer option.

 

The JESD204B and JESD204C IP Cores are silicon proven, thoroughly tested in UVM regression environment and have been interoperability tested with key ADC/DAC providers and leading Serdes PHY solutions. The Interlaken IP supports up to 2.6 Tbps bandwidth performance on up to 48 lanes with 56 Gbps Serdes rates and comes with an integrated Media Access layer. 

Architecture Diagram

JESD204 diagram

Success Story

Customer experience

Customer: Key OEM  |  Location: South Korea

Challenge

Building a 5G chip for processing massive MIMO requiring exchange of a massive amount of data

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Solution

Comcores’ unique interface technology enabled our customer to build a state-of-the-art chip with terabytes of interface capability and with a lot of flexibility to host different configurations.

Comcores unique insight and experience with these interface protocols provided the customer with a partner that could actively provide advice for design decisions and ensure a safe way to final success.

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Press Release  Copenhagen, Denmark, June 7, 2023 - A leading company in the defense and aerospace industry, has purchased the Interlaken IP core from Comcores to meet its high-speed data transfer requirements. This strategic investment aims to enhance data transfer capabilities in both their Application-Specific Integrated Circuit (ASIC) and Field-Programmable Gate Array (FPGA) implementations utilizing speeds of 256 Gbps. Interlaken, a lightweight and feature-rich data transfer protocol, will...

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Predictions and expectations of the upcoming JESD204D standard

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JESD204D Webinar: Expert insights into what we Expect and how to Prepare for the upcoming Standard

Join our upcoming webinar on JESD204 and get insights into what we predict the upcoming JESD204D standard will contain, based our experience working with JESD204. Our expert speaker, Piotr Koziuk, has over a decade of experience with JESD204 standards and is a member of the JEDEC Standardization Committee. He will share his prediction of what could be the features of the JESD204D and explain potentially how the new architecture will improve the Bit Error Rate (BER) through Reed Solomon Forward...

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