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Chip to Chip

Cutting Edge Chip to Chip Solutions

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Overview

Comcores chip-to-chip portfolio consists of JESD204B, JESD204C, JESD204D and JESD204 Verification IP, Interlaken IP, MIPI RFFE Master and Slave IP Cores. Comcores is a leading provider of JESD204B and JESD204C. The JESD IP comes with the widest parameter set available and has gone through extensive testing. The JESD IP core enables quick and reliable deployment of both the transmitter (TX) and the receiver (RX) link layer and comes optionally with a tightly integrated transport layer option.

 

The JESD204B and JESD204C IP Cores are silicon proven, thoroughly tested in UVM regression environment and have been interoperability tested with key ADC/DAC providers and leading Serdes PHY solutions. The Interlaken IP supports up to 2.6 Tbps bandwidth performance on up to 48 lanes with 56 Gbps Serdes rates and comes with an integrated Media Access layer. 

Architecture Diagram

JESD204 diagram

Success Story

Customer experience

Customer: Key OEM  |  Location: South Korea

Challenge

Building a 5G chip for processing massive MIMO requiring exchange of a massive amount of data

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Solution

Comcores’ unique interface technology enabled our customer to build a state-of-the-art chip with terabytes of interface capability and with a lot of flexibility to host different configurations.

Comcores unique insight and experience with these interface protocols provided the customer with a partner that could actively provide advice for design decisions and ensure a safe way to final success.

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