Ethernet MAC 10M/100M/1G/2.5G
Overview
Comcores 10M/100M/1G/2.5G Ethernet MAC IP solution is a low latency and low size solution that complies to IEEE 802.3 while keeping implementation complexity at a minimum. The core is fully configurable and can optionally include features like IEEE1588 and DMA integrations.
The core is prepared for easy interfacing with Comcores 10/100/1000/2500 SGMII PCS IP solution. The structure agnostic implementation ensures easy use and integration whether the target technology is FPGA, ASSP or ASIC.
Block Diagram
Key Features
Delivers Performance
- Designed to IEEE 802.3-2012 specification
- Ultra low latency and compact implementation
- Full duplex Ethernet interfaces
Silicon Agnostic
- Designed in VHDL-93 and targeting any RTL implementation like ASICs, ASSPs and FPGAs
Highly Configurable
- 8-bit low latency 10/100/1000/2500 Ethernet MAC with optional Cut-through support
- Ready for IEEE 1588 and DMA integration
- Comes with MII, GMII and RGMII interface
Feature Rich
- FCS generation supported
- Comprehensive statistics gathering as an option
- Supports VLAN and jumbo frames as an option
- Independent TX and RX Maximum Transmission Unit (MTU) frame length
- Very easy integration with standard Xilinx AXI4 Lite control interface or APB
Deliverables
The IP core comes deeply verified and with an extensive documentation that, among others, includes Product Brief and User Manual. The product comes with Synthesis script for Synopsys Design Compiler, Timing Constraints in Synopsys SDC format and Direct support by Comcores engineers. The core will by default come in an encrypted format. Source code option is available.
Please Contact us to discuss your project requirements.
What Comcores IP will do for you
Proven Quality
Solid process and predictability
Strong verification
Faster Time-to-Market
First in bringing out new solutions
Tremendous investments in research
Know-How
Long-term experience in communication protocols
Expert in executing digital design projects
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