10G/25G Ethernet MAC
Overview
Comcores 10G/25G Ethernet MAC provides a complete IEEE 802.3 Ethernet Layer 2 solution. The MAC IP core performs the Link function of the 10G/25G Ethernet Standard and is a low latency cut-through implementation reaching best in market results while still keeping size at a minimum.
The core is fully configurable and can optionally include features like IEEE1588 and DMA integrations. The core is prepared for easy interfacing with Comcores 10G/25G PCS solution.
The Ethernet MAC Core, on the Client side, implements a 64-bit AXI-S interface for Express and Preemptable traffic respectively while having a standard XGMII interface on the PHY side.
Block Diagram
Key Features
Delivers Performance
- Designed to IEEE 802.3-2012 specification
- Ultra low latency and compact implementation
- Full duplex Ethernet interfaces
- PCS sublayer for 10/25 Gb/s operation available as separate block
Silicon Agnostic
- Designed in VHDL-93 and targeting any RTL implementation like ASICs, ASSPs and FPGAs
Highly Configurable
- 10G/25G data rates with cut-through supported
- Ready for IEEE 1588 integration
- Comes with XGMII and AXI-S interface
Easy to use
- Deficit Idle Count for maximum data throughput supported
- FCS generation supported
- Comprehensive statistics gathering
- Independent TX and RX Maximum Transmission Unit (MTU) frame length
- Very easy integration with standard Xilinx AXI4 Lite control interface or APB
Deliverables
The IP core comes deeply verified and with an extensive documentation that, among others, includes Product Brief and User Manual. The core will by default come in an encrypted format. Source code option is available.
Please Contact us to discuss your project requirements.
What Comcores IP will do for you
Proven Quality
Solid process and predictability
Strong verification
Faster Time-to-Market
First in bringing out new solutions
Tremendous investments in research
Know-How
Long-term experience in communication protocols
Expert in executing digital design projects
Related material
