Ethernet MAC 10G/25G

Overview

Comcores Ethernet MAC 10G/25G IP solution enables the host to communicate data using the IEEE 802.3 standard for the respective speeds and is suited for use in networking equipment such as switches and routers. Comcores Ethernet MAC is silicon-proven and designed for easy integration into ASICs and FPGAs.

The Client-side interface is a 64-bit AXI-S and comes with a 64-bit XGMII interfaces on the PHY side. The Ethernet MAC IP features a compact and low latency solution, it is highly configurable and can optionally include IEEE 1588 Timestamping Unit (TSU). The Ethernet MAC IP is prepared for easy integration with Comcores Ethernet PCS 10G/25G IP solution.

Block Diagram

Comcores Ethernet MAC 10G 25G diagram

Key Features

Delivers Performance

  • Designed to IEEE 802.3-2018 specification
  • Low latency and compact implementation
  • Full duplex Ethernet interfaces

Highly Configurable

  • Can be delivered with IEEE 1588 and/or 10G/25G PCS
  • Can be delivered with statistics gathering or status vectors
  • 64-bit AXI-S64-bit AXI-Stream interface
  • Cut-through operation mode, Store and Forward is optional
  • Comes with XGMII as default PHY interface

Feature Rich

  • Deficit Idle Count for maximum data throughput supported
  • FCS generation supported
  • Optional statistics gathering
  • Jumbo frames support
  • Easy integration with standard AXI4-Lite control interface or APB
  • Promiscuous and non-promiscuous mode
  • Optional MDIO interface

Silicon Agnostic

  • Designed in SystemVerilog and targeting both ASICs and FPGAs

Deliverables

The IP Core can be delivered in Source code or Encrypted format. The following deliverables will be provided with the IP Core license:

  • Solid documentation, including User Manual and Release Note.
  • Simulation Environment, including Simple Testbed, Test case and Test Script.
  • Programming Register Specification.
  • Timing Constraints in Synopsys SDC format.
  • Access to support system and direct support from Comcores Engineers.
  • Synopsys SGDC Files (optional).
  • Synopsys Lint, CDC and Waivers (optional).

Related Products

What Comcores IP will do for you

R

Proven Quality

Solid process and predictability

Strong verification

Faster Time-to-Market

First in bringing out new solutions

Tremendous investments in research

Know-How

Long-term experience in communication protocols

Expert in executing digital design projects

PTP profiles for 5G networks

Niklas Meyer Mortensen - Jan 04, 2022. The IEEE 1588 PTP standards provide a wealth of options and the basis for highly reliable and accurate time synchronization solutions. However, the time synchronization needs of specific applications in different industries can vary quite significantly. These specific needs are defined in separate PTP profile standards, often in collaboration with other industry standards organizations. For 5G, both IEEE and ITU-T provide relevant profiles that can...

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100G MAC and 100G PCS IP Cores are now available

Press Release Copenhagen, Denmark, September 6, 2021 - Comcores ApS, a fast-growing specialized supplier of Intellectual Property (IP) Cores, today announced the availability of a 100G Ethernet MAC IP including the Reconciliation Sublayer (RS), as well as a 100G PCS IP that includes RS-FEC and Base-R (SC)- FEC sublayers. Comcores Ethernet MAC 100G provides a complete IEEE 802.3 Ethernet Layer 2 solution. The MAC IP core performs the Link function of the 100G Ethernet...

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25G Ethernet Subsystem is now available

Press Release Copenhagen, Denmark, May 19, 2021 - Comcores ApS, a fast-growing specialized supplier of Intellectual Property (IP) Cores, today announced the availability of Ethernet Subsystem solution, a silicon agnostic and easy-to-use integration of 10G/25G Ethernet MAC and PCS for Time-Aware Applications. The Ethernet Subsystem comes in different variations and can be delivered integrated with TimeStamping Unit, IEEE 1588 PTP Software Stack and later also with OMA Controller. The...

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