DMA Controller
Overview
Comcores multi-channel DMA Controller IP core provides high bandwidth direct memory access between memory and AXI4-Stream or AHB type of IP peripherals for up to 16 channels. The DMA IP includes Scatter-Gather capabilities which help in offloading data movement tasks from the Central Processing Unit (CPU) in processor-based systems.
Configuration of status and management registers are accessed through an AXI4-Lite or AHB slave interface. Control and Status streaming interfaces are used for sending/receiving user application data. Interrupts are available to indicate error and completion events.
Key Features
Richly featured
- AMBA/AHB and AXI4-Streaming compliant user interface
- 1–16 independent DMA channels supporting bi-directional data transfers
- Driver for Linux platform is available
Solid
- Silicon proven
- UVM VIP is available
Flexible
- Scatter-Gather DMA mode enabled
- Supports Memory-Memory, Memory-Peripheral and Peripheral-Memory
Silicon Agnostic
- Designed in VHDL and targeting both ASICs and FPGAs
Deliverables
The IP Core can be delivered in Source code or Encrypted format. The following deliverables will be provided with the IP Core license:
- Solid documentation, including User Manual and Release Note.
- Simulation Environment, including Simple Testbed, Test case and Test Script.
- Access to support system and direct support from Comcores Engineers.
- Linux Driver (optional).
- Synopsys Lint and CDC (optional).
Related Products
What Comcores IP will do for you
Proven Quality
Solid process and predictability
Strong verification
Faster Time-to-Market
First in bringing out new solutions
Tremendous investments in research
Know-How
Long-term experience in communication protocols
Expert in executing digital design projects
Webinar on understanding TSN and its use cases for Aviation, Aerospace and Defence
What is TSN?
Morten Kofoed Esbjørn - Feb 14, 2023. TSN, or Time-Sensitive Networking, is a technology based on the IEEE 802.1Q standard. It has evolved from the Ethernet technology currently used to carry all types of traffic, for which ethernet was not originally intended, such as multiple data flows with different timing requirements, commonly found in Audio Video Bridging (AVB), automotive and industrial automation applications. TSN sits in Layer 2 of the OSI Model (figure 1).Figure 1: Illustration of...
Comcores TSN technology and 5G communication expertise to be deployed in a significant EU funded project with pan-European partners
Morten Kofoed Esbjørn - Jan 20, 2023. The OCTAPUS initiative is an EU funded project, which started in September 2022 and is funded until February 2026. OCTAPUS stands for “Optical Circuit switched Time-Sensitive Network (TSN) architecture for highspeed Passive optical networks and next generation Ultra-dynamic & reconfigurable central office environments”, and the goal is to deliver an agile, low-cost and energy efficient Photonic Integrated Circuit (PIC) technology framework. OCTAPUS was...