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Overview

Comcores multi-channel DMA IP core provides high bandwidth direct memory access between memory and AXI4-Stream or AHB type of IP peripherals for up to 16 channels. The DMA IP includes Scatter-Gather capabilities which help in offloading data movement tasks from the Central Processing Unit (CPU) in processor-based systems.

Configuration of status and management registers are accessed through an AXI4-Lite or AHB slave interface. Control and Status streaming interfaces are used for sending/receiving user application data. Interrupts are available to indicate error and completion events.

Block Diagram

DMA Block Diagram

Key Features

Richly featured

  • AMBA/AHB and AXI4-Streaming compliant user interface
  • 1–16 independent DMA channels supporting bi-directional data transfers
  • Driver for Linux platform is available

Silicon Agnostic

  • Designed in VHDL and targeting any RTL implementation like ASICs, ASSPs and FPGAs.

Flexible

  • Scatter-Gather DMA mode enabled
  • Supports Memory-Memory, Memory-Peripheral and Peripheral-Memory

Solid

  • Silicon proven
  • UVM VIP is available

Deliverables

The IP core comes deeply verified and with an extensive documentation that, among others, includes Product Brief, User Manual, and Test Bench. The core will by default come in an encrypted format. Source code option is available.

Please Contact us to discuss your project requirements.

What Comcores IP will do for you

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Proven Quality

Solid process and predictability

Strong verification

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Faster Time-to-Market

First in bringing out new solutions

Tremendous investments in research

Know-How

Long-term experience in communication protocols

Expert in executing digital design projects

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