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Ethernet Switch 1G

Overview

Comcores Ethernet Switch IP core is a highly configurable and size-optimized implementation of a non-blocking crossbar switch that allows continuous transfers between up to 16 ports Ethernet ports via 1 Gbps GMII interfaces. The switch supports MAC learning and implements store-and-forward switching approach in order to fulfill Ethernet standard policy regarding frame integrity checking.

The switch supports up to 16 ports where each port provides GMII native interface for Ethernet PHY devices. The number of ports is configurable at compile time. Comcores Ethernet Switch IP core is a silicon agnostic implementation targeting both ASICs and FPGAs.

Block Diagram

Ethernet Switch 1G Block Diagram

Key Features

Highly Configurable

  • Up to 16 ports configurable at compile time
  • Configurable queuing behavior (round-robin, fair queuing)
  • Supports Ethernet Multicast

Feature-rich 

  • Automatic MAC addresses learning and aging
  • Support programmable static forwarding entries
  • Full duplex Ethernet interfaces
  • Support VLAN

Ultra Compact Size

  • Build to target low size

    Easy to use

    • GMII interfaces for attaching to an external Physical Layer device (PHY)
    • Can be used in managed or unmanaged implementations

    Silicon Agnostic

    • Designed in VHDL and targeting both ASICs and FPGAs

    Deliverables

    The IP Core can be delivered in Source code or Encrypted format. The following deliverables will be provided with the IP Core license:

    • Solid documentation, including User Manual and Release Note.
    • Simulation Environment, including Simple Testbed, Test case, Test Script.
    • Access to support system and direct support from Comcores Engineers.
    • Synopsys Lint and CDC (optional)

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    Features \ Products

    Description

    Port Configuration

    Number of ports

    Port Interface

    Frame size

    Statistical Counters

    VLAN support

    Multicast

    MAC address learning

    MAC address aging

    QoS Features

    IEEE 1588 Transparent Clock

    IEEE 1588 Boundary clock (PTP.v2)

    Time Sensitive Networking (TSN) Features

    Packet Trapping

    Software API

    Ethernet Switch 1G

    Space Efficient Switch for Embedded Applications

    1G

    2-36 Ports

    GMII

    64B - 16384B

    Yes

    Yes

    Yes

    Yes

    Yes

    -

    -

    -

    -

    -

    -

    Ethernet Switch 1G/10G

    Space Efficient Switch for Embedded Applications

    1G/10G

    2-40 (1Gbps Ports) & 0-4 (10Gbps Ports)

    XGMII/XXVMII (1G/10G)

    64B - 16384B

    Yes

    Yes

    Yes

    Yes

    Yes

    -

    -

    -

    -

    -

    -

    Ethernet Switch 10G

    Space Efficient Switch for Embedded Applications

    10G

    3-20 Ports

    XGMII

    64B - 16384B

    Yes

    Yes

    Yes

    Yes

    Yes

    -

    -

    -

    -

    -

    -

    Ethernet Switch 10G/25G

    Space Efficient Switch for Embedded Applications

    10G/25G

    12 (10Gbps Ports) & 4 (25Gbps Ports)

    XGMII/XXVMII (10G/25G)

    64B - 16384B

    Yes

    Yes

    Yes

    Yes

    Yes

    -

    -

    -

    -

    -

    -

    Ethernet Packet Switch 1G

    Ethernet Switch with External DDR Packet Buffers

    1G

    Up to 8 Ports (1G/2.5G speed supported)

    GMII

    Up to 2048 bytes support

    Yes

    Yes

    Yes

    Yes

    Yes

    Yes

    -

    -

    -

    -

    -

    ETHERNET TSN ADVANCED SWITCH 10M/100M/1G/10G/25G – MANTICORE

    Advanced Switch for High Throughput Applications

    10M/100M/1G/10G/25G

    Up to 64 Ports 

    AXI4 S/XGMII

    64B - 16384B

    Yes

    Yes

    Yes

    Yes

    Yes

    Yes

    Yes

    Yes

    Yes

    Yes

    Yes

    What Comcores IP will do for you

    Proven Quality

    Solid process and predictability

    Strong verification

    Faster Time-to-Market

    First in bringing out new solutions

    Tremendous investments in research

    Know-How

    Long-term experience in communication protocols

    Expert in executing digital design projects

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