The Comcores JESD204B IP core is a high-speed point-to-point serial interface intellectual property (IP). The JESD204B IP core has been hardware-tested with a number of selected JESD204B-compliant ADC (analog-to-digital converter) and DAC (digital-to-analog) devices.
The purpose of this document is to provide the reader with detailed understanding of how the Inter-Operability Testing (IOT) between Comcores JESD204B IP core and Analog Devices AD9152 DAC has been carried out.
Comcores’s JESD204B IP implementation is a fully silicon agnostic implementation of the standard  and comes as fully separate RX and TX link entities with the option of including a transport layer function.
For this interoperability the JESD204B IP has been implemented at a Xilinx ZC706 evaluation board in order to carry out the test of the TX function.